The Cursor for Chip Design - Delivering Silicon-Ready Chip Designs…
Chip design teams spend significant time writing, debugging, and onboarding around RTL/HDL, slowing down silicon-ready development.
An AI-native VSCode-based assistant that generates and iteratively refines synthesizable HDL and testbenches from natural language using fine-tuned Verilog LLMs, reinforcement learning, and compiler feedback.
Hardware/RTL engineers and semiconductor design teams (including enterprises) building digital chips with EDA toolchains.
I’m Rohil Khare, Co-Founder of SigmanticAI. I studied EECS at UC Berkeley and previously worked at Amazon. In high school, I filed provisional patents in IoT as an early innovator, and since then I’ve worked at multiple startups at the intersection of hardware and machine learning. At Berkeley, I conducted research at BAIR and the Architecture Group, and published at ICRA. Now, at SigmanticAI, I’m building AI-native tooling that accelerates the creation of custom chip designs and silicon.
I'm Tamzid Razzaque, Co-Founder of SigmanticAI. I studied EECS at UC Berkeley, with a focus on integrating AI applications with custom hardware design. I am continuing this passion at YC. I previously worked at Apple on custom circuits and researched at BWRC and BETR on custom FPGA accelerators.




